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Engineering Prototype Report for EP-68 - 6.6 W DC-DC Flyback Converter Using DPA-SwitchTM (DPA423G)
Specification Input: 36-57 VDC, Output: 3.3 V / 2 A Application Author Document Number Date Revision Power over Ethernet (PoE) Power Supply Power Integrations Applications Department EPR-68 19-Jul-2005 1.1
Summary and Features * High efficiency, low parts count and low cost power supply * Ideally suited for PoE, VoIP, standby and other distributed 48 V DC-DC conversion applications * Signature circuit is fully compatible with IEEE 802.3af requirements * DPA-Switch Integrates * PWM controller and 220 V MOSFET switching device * Accurate input voltage UV detection and OV protection * Thermal, overload, short-circuit and open loop protection * Regulation at zero load (cycle skipping) * Accurate 400 kHz trimmed internal oscillator * Small footprint 2" x 1", low overall height 0.9", dual layer PCB * 100% surface mount construction
The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com.
Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com
EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
Table Of Contents
Introduction..................................................................................................................3 Power Supply Specification .........................................................................................4 Schematic ...................................................................................................................5 Circuit Description .......................................................................................................6 4.1 DPA-Switch Primary............................................................................................6 4.2 Output Rectification .............................................................................................6 4.3 Output Feedback.................................................................................................7 5 PCB Layout .................................................................................................................7 6 Bill of Materials ............................................................................................................8 7 Transformer Specification ...........................................................................................9 7.1 Electrical Diagram ...............................................................................................9 7.2 Electrical Specifications.......................................................................................9 7.3 Materials..............................................................................................................9 7.4 Transformer Build Diagram ...............................................................................10 7.5 Transformer Construction..................................................................................10 8 Transformer Spreadsheet .........................................................................................11 9 Performance Data .....................................................................................................13 9.1 Efficiency ...........................................................................................................13 9.2 Regulation .........................................................................................................14 9.2.1 Load...............................................................................................................14 9.2.2 Line ................................................................................................................14 9.3 Peak Power .......................................................................................................15 10 Waveforms ................................................................................................................15 10.1 Drain Voltage and Current, Full Load Operation ...............................................15 10.2 Output Voltage Start-Up Profile .........................................................................16 10.3 Drain Voltage and Current Start-Up Profile .......................................................16 10.4 Load Transient Response (75% to 100% Load Step) .......................................17 10.5 Output Ripple Measurements............................................................................18 10.5.1 Ripple Measurement Technique ....................................................................18 10.5.2 Output Ripple Measurements ........................................................................19 11 Thermal Performance................................................................................................20 12 Control Loop Measurements .....................................................................................22 12.1 36 VDC Maximum and Nominal Load ...............................................................22 12.2 57 VDC Maximum Load ....................................................................................23 13 Revision History ........................................................................................................24 Important Note: Although this board is designed to satisfy safety telecom isolation requirements, this engineering prototype has not been agency approved. 1 2 3 4
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Page 2 of 28
19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
1 Introduction
This engineering report describes a 3.3 V / 2 A (6.6 W) DC-DC converter that is based on a DPA423G device. This design is intended as an evaluation platform for DPA-Switch devices in the low cost surface-mount DIP package. High operating efficiency, low parts count, small footprint and low height make this an ideal choice for Power over Ethernet (PoE) and VoIP DC-DC converter applications. This report contains the power supply specification, schematic, bill of materials, transformer documentation, printed circuit board layout, and performance data.
Figure 1 - EP68 Populated Circuit Board Photograph.
Page 3 of 28
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
2 Power Supply Specification
Description Input Voltage Output Output Voltage Output Ripple Voltage Continuous Output Current Peak Output Current Total Output Power Continuous Output Power Peak Output Power Efficiency Environmental Safety Isolation Ambient Temperature TAMB 1500 0 50 VDC
o
Symbol VIN VOUT1 VRIPPLE1 IOUT IOUT POUT POUT_PEAK
Min 36 3.20 2.0
Typ
Max 57
Units VDC V mVpp A A W W %
Comment
PoE input range specification 3% including set point and line/load regulation 20 MHz bandwidth
3.30 35 2.5
3.40 50
6.6 8.3 77 78
Measured at 48 V, o POUT (6.6 W), 25 C
1 min.
Free convection, sea level
C
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
3 Schematic
*All resistors and capacitors are 0805 size unless otherwise specified
Figure 2 - EP68 Schematic.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
4 Circuit Description
The Flyback topology was used to minimize circuit board size, parts count and cost, while attaining excellent operating efficiency across the input voltage range. 4.1 DPA-Switch Primary The DPA423G IC provides PWM control, startup, feedback, under/over voltage and overtemperature protection functions. The integrated 220 V MOSFET provides excellent switching characteristics at the selected 400 kHz operating frequency. The MOSFET and controller consume minimal power, enabling a typical operating efficiency of 74%-78% across the operating input voltage range (see Figure 7). R1 provides a 25 k input impedance, consistent with PoE Class 0 requirements. Above 30 V, Zener VR1 conducts, allowing n-channel MOSFET Q1 to turn on. Zener diode VR2 protects the gate of Q1 from overvoltage damage. Resistors R2 and R3 provide repeatable on and off timing. Resistor R5 programs the typical input under-voltage ON threshold to 33 VDC. Resistors R4 and R6 program the internal device current limit to reduce with increasing input voltage. Maximum output (overload) current varies less than 5% across the operating voltage range. The reduction in overload output current reduces secondary transformer leakage spikes and allows the use of a 30 V Schottky diode, for the output rectifier D1. The primary-side Zener clamp, VR3, provides protection of the DPA423G drain under input surge and overvoltage conditions. Zener diode VR3 does not conduct under normal operating conditions. The primary bias winding provides CONTROL pin current after start-up. Diode D2 rectifies the bias winding, while components R8 and C11 reduce the high frequency switching noise and reduce the peak charging of the bias voltage. The DPA423G operates well within the recommended junction temperature limits (100 C) at an elevated ambient of 50 C, in a free-convection cooled environment (see Section 11). 4.2 Output Rectification Schottky output diode D1 enables low-loss rectification of the secondary winding voltage. Low ESR tantalum output capacitors, C7-9, reduce switching ripple and minimize losses. Secondary output choke L1 and ceramic output capacitor C10 reduce high frequency noise and ripple at the output.
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
4.3 Output Feedback The output voltage is sensed via the resistor divider formed by R12 and R13 and fed into the reference pin of the low voltage reference, U3. Feedback compensation components R10, R11, and C13 ensure stable operation and optimum line and load transient response. Capacitor C12 provides a soft-finish characteristic, preventing output voltage overshoot during startup of the converter.
5 PCB Layout
Figure 3 - Top Side, SMT Printed Circuit Layout (Top View).
Figure 4 - Bottom Side, SMT Printed Circuit Layout (Top View).
Page 7 of 28
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
6 Bill of Materials
Item
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Qty
1 1 1 1 1 1 2 1 3 1 1 1 1 1 4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Reference
U1 U2 U3 C1, C2 C3 C4 C5, C13 C6 C7-9 C10 C11 C12 D1 D2 J1-1,2 J2-1,2 L1 L2 Q1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 T1 VR1 VR2 VR3
Description
DPA-Switch Optocoupler, 80-160% graded CTR Low voltage shunt regulator, SOT23 1.5 F, 100 V, 1812 47 pF, 200 V 1000 pF, 1500V, 1808 0.1 F, 50 V 22 F, 10 V, tantalum, C size 330 F, 6.3 V, tantalum, X size 1 F, 10 V, 0508 alternative geometry 1 F, 50 V, 1206 0.33 F, 50 V 30 V, 4 A Schottky 200 V, 200 mA Pin, Surface Mount, 0.040 x 0.375" 10 H, 1 A 1 H, 2 A MOSFET, N Channel, 100 V, 250 m 24.9 k, 1%, 1206 51 k 249 k 1.00 M, 1% 619 k, 1% 8.66 k, 1% 10 100 5.1 75 1 k 34.0 k, 1% 20.0 k, 1% ER14.5 Transformer 27V, 500 mW, SOD123 15V, 200 mW, SOD323 150V TVS
P/N
DPA423G PC357N1TA CAT431L THCS50E2A155ZT ECJ-2VC2D470J 1808SC102KAT1A ECJ-2YB1H104K ECST1AC226R T495X337K006AS ECY-29RA105KV ECJ-3FF1H105Z ECJ-2YB1C334K SL43 BAV21 4531051-0000 SCD-0403-100MT SCD-0403-1R0M Si2328DS-T1 ERJ-8ENF2492V ERJ-6GEYJ513V ERJ-6GEY2493V ERJ-6ENF1004V ERJ-6ENF6193V ERJ-6ENF8661V ERJ-6GEYJ100V ERJ-6GEYJ101V ERJ-6GEYJ5R1V ERJ-6GEYJ750V ERJ-6GEYJ102V ERJ-6ENF3402V ERJ-6ENF2002V LSTA30825 SIL6029 IM 040 202 31 BZT52C27-7 BZT52C15S-7 SMAJ150A
Manufacturer
Power Integrations Sharp Catalyst Semiconductor UCC Panasonic AVX Panasonic Panasonic Kemet Panasonic Panasonic Panasonic Vishay generic Zierick Chilisin Chilisin Vishay Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic L.S.E. HiCal Vogt Diodes, Inc. or Generic Diodes, Inc. or Generic Generic
*Resistors and capacitors are size 0805, unless otherwise specified.
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
7 Transformer Specification
7.1 Electrical Diagram
ER14.5 3C96 / 3F3, 10 pin Bobbin 1 9,10
WDG #4 10T #34 AWG 2
WDG #3 2T #28 AWG x2 6,7 4
WDG #1 10T #34 AWG
WDG #2 8T #34 AWG 5
3
Figure 5 - Transformer Electrical Diagram.
7.2
Electrical Specifications
1 second, 60 Hz, from Pins 1-5 to Pins 6-10 Pins 1-3, all other windings open Pins 1-3, all other windings open Pins 1-3, with Pins 6/7-9/10 shorted 1500 VDC 120 H, +/-10% 7.5 MHz (min.) 3.0 H (max.)
Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance
7.3
Materials
Item [1] [2] [3] [4] [5] [6] [7] Description Core: ER14.5, Ferroxcube 3C96, 3F3 (or equivalent), ALG = 312 nH/T2 Bobbin: ER14.5, 10 pin Magnet Wire: #34 AWG, Double Coated (Heavy Nyleze) Magnet Wire: #28 AWG, Double Coated (Heavy Nyleze) Tape: 3M 1298 Polyester Film (or equivalent), 1.8 mm wide Core Clamp ER14.5 Ferroxcube CLM14.5 (optional) Varnish (DIPPED ONLY, NOT IMPREGNATED)
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
7.4
Transformer Build Diagram
Pin Side
1 Tape
1/2 Primary
Tape 6,7
Secondary
9,10 Tape 5 4 2 3
Bias 1/2 Primary
Figure 6 - Transformer Build Diagram.
7.5
Transformer Construction
Bobbin Preparation 1/2 Primary Bias Winding Basic Insulation Secondary Winding Basic Insulation 1/2 Primary Outer Insulation Final Assembly Arrange bobbin & rotation such that primary start/finish wires do not overlap. Start at Pin 3. Wind 10 turns of item [3] in 1 layer. Bring finish lead back and terminate on Pin 2. Starting at Pin 4, wind 8 turns of item [3]. Spread turns evenly across bobbin in a single layer. Bring finish lead back and terminate on Pin 5. Use one layer of item [5] for basic insulation. Start at Pins 9 and 10. Wind 2 turns of bifilar item [4] in 1 layer. Bring finish lead back and terminate on Pins 6 and 7. Use one layer of item [5] for basic insulation. Continue from Pin 2. Wind 10 turns of item [3] in 1 layer. Bring finish lead back and terminate on Pin 1. Use one layer of item [5] for basic insulation. Assemble and secure (glue or clamp, item[6]) core halves. Dip varnish item [7] and cure.
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
8 Transformer Spreadsheet
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
9 Performance Data
All measurements were taken at room temperature utilizing a DC input source and dynamic DC loads. Input and output voltages and output current were measured with dedicated DVMs. 9.1 Efficiency
Efficiency Vs. Output Load
80% 79% 78% 77%
Efficiency (%)
76% 75% 74% 73% 72% 71% 70% 0.50
VIN=36 VDC VIN=48 VDC VIN=57 VDC
0.75
1.00
1.25
1.50
1.75
2.00
Load Current (A)
Figure 7 - Efficiency vs Output Load, Room Temperature.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
9.2
Regulation
9.2.1 Load
Load Regulation
3.40
Output Voltage (VDC)
3.35
VIN=36 VDC
3.30
VIN=48 VDC
VIN=57 VDC
3.25
3.20 0.0 0.3 0.5 0.8 1.0 1.3 1.5 1.8 2.0
Load Current (A)
Figure 8 - Load Regulation, Room Temperature.
9.2.2 Line
Line Regulation
3.40
Output Voltage (VDC)
3.35
Full Load (2 A)
3.30
50% Load (1 A)
No Load
3.25
3.20 30.0
40.0
50.0
60.0
Input Voltage (VDC)
Figure 9 - Line Regulation, Room Temperature.
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
9.3 Peak Power The DC output load current was recorded just prior to the auto-restart operation.
Maximum Output Current
3.00
2.90
Output Current (A)
2.80
2.70
2.60
2.50 30.0
40.0
50.0
60.0
Input Voltage (VDC)
Figure 10 - Maximum Output Overload Current, Room Temperature.
10 Waveforms
10.1 Drain Voltage and Current, Full Load Operation
Figure 11 - 36 VDC, Full Load. Upper: IDRAIN, 0.5 A / div. Lower: VDRAIN, 50 V, 1 s / div.
Figure 12 - 57 VDC, Full Load. Upper: IDRAIN, 0.5 A / div. Lower: VDRAIN, 50 V, 1 s / div.
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EP68 3.3 V, 2 A DC-DC Power Supply 10.2 Output Voltage Start-Up Profile
19-Jul-2005
Figure 13 - Start-Up Profile, 36 VDC, No Load (worst-case). Upper: VOUT, 1 V / div. Lower: VDRAIN, 50 V, 10 ms / div.
Figure 14 - Start-Up Profile, 57 VDC, No Load (worst-case). Upper: VOUT, 1 V / div. Lower: VDRAIN, 50 V, 10 ms / div.
10.3 Drain Voltage and Current Start-Up Profile
Figure 15 - 36 VDC Input, 2 A Resistive Load. Upper: IDRAIN, 0.5 A / div. Lower: VDRAIN, 100 V, 10 ms / div.
Figure 16 - 57 VDC Input, 2 A Resistive Load. Upper: IDRAIN, 0.5 A / div. Lower: VDRAIN, 100 V, 10 ms / div.
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
10.4 Load Transient Response (75% to 100% Load Step) In the following two oscilloscope screen shots (Figures 17 and 18), signal averaging was used to more clearly capture the output voltage response to a load transient. Averaging minimizes the appearance of the 400 kHz switching ripple in the output voltage scope plot. The load current step was used to trigger the horizontal sweep of the oscilloscope.
Figure 17 - Transient Response, 36 VDC, 75-100-75% Load Step. Top: Load Current, 1 A / div. Bottom: Output Voltage, 20 mV, 500 s / div.
Figure 18 - Transient Response, 57 VDC, 75-100-75% Load Step. Top: Load Current, 1 A / div. Bottom: Output Voltage, 20 mV, 500 s / div.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
10.5 Output Ripple Measurements 10.5.1 Ripple Measurement Technique For DC output ripple measurements, a modified oscilloscope test probe must be utilized in order to reduce spurious signals due to pickup. Details of the probe modification are provided in Figures 19 and 20. The 5125BA probe adapter is affixed with two capacitors tied in parallel across the probe tip. The capacitors include one (1) 0.1 F/50 V ceramic type and one (1) 1.0 F/50 V aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper polarity across DC outputs must be maintained (see below).
Probe Ground
Probe Tip
Figure 19 - Oscilloscope Probe Prepared for Ripple Measurement (End Cap and Ground Lead Removed).
Figure 20 - Oscilloscope Probe with Probe Master 5125BA BNC Adapter (Modified with Wires for Probe Ground for Ripple Measurement, and Two Parallel Decoupling Capacitors Added).
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
10.5.2 Output Ripple Measurements
Figure 21 - Ripple, 36 VDC, Full Load. Top: 10 mV / div, 50 s / div. Bottom: 10 mV / div, 2 s / div.
Figure 22 - Ripple, 48 VDC, Full Load. Top: 10 mV / div, 50 s / div. Bottom: 10 mV / div, 2 s / div.
Figure 23 - Ripple, 57 VDC, Full Load. Top: 10 mV / div, 50 s / div. Bottom: 10 mV / div, 2 s / div.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
11 Thermal Performance
The temperatures of key components were recorded using T-type thermocouples. Two of the four thermocouples were soldered; one directly to a SOURCE pin of the DPA423G (U1) and the other to the cathode of the output rectifier (D1). The other two thermocouples were glued; one to the transformer (T1) core, on the center leg, and the other to the case of the first (of the two) high-ripple output capacitor (C7). The unit was operated at full load, at 36 VDC, 48 VDC and 57 VDC, in free convection within a small enclosure. The results show adequate thermal margin, considering an additional ambient rise of +28 C, equivalent to operating at an ambient of 50 C. At 36 VDC, full load, within an enclosure at 50 C ambient, this equates to a DPA423G case temperature of 79 C. This is well below the recommended maximum case temperature of 100 C. Figure 24 is an infrared thermograph taken at nominal-line (48 VDC).
Measured Temperature (C) Item Ambient DPA423G (U1) Transformer core (T1) Output Rectifier (D1) Output Capacitor (C7) 36 VDC
22 51 75 63 45
48 VDC
22 51 75 61 43
57 VDC
22 53 75 61 43
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19-Jul-2005
EP68 3.3 V, 2 A DC-DC Power Supply
TOP VIEW
BOTTOM VIEW
Figure 24- Infrared Thermograph of the EP68 Board, 48 VDC, Full Load, Room Ambient.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
12 Control Loop Measurements
12.1 36 VDC Maximum and Nominal Load
Figure 25 - Gain-Phase Plot, 36 VDC, Maximum Load (2 A). Vertical Scale: Gain = 10 dB / div, Phase = 30 / div. Crossover Frequency = 10.0 kHz, Phase Margin = 60
Figure 26 - Gain-Phase Plot, 36 VDC, Light Load (100 mA). Vertical Scale: Gain = 10 dB / div, Phase = 30 / div. Crossover Frequency = 0.9 kHz, Phase Margin = 65
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19-Jul-2005 12.2 57 VDC Maximum Load
EP68 3.3 V, 2 A DC-DC Power Supply
Figure 27 - Gain-Phase Plot, 57 VDC, Light Load (100 mA). Vertical Scale: Gain = 10 dB / div, Phase = 30 / div. Crossover Frequency = 10.8 kHz, Phase Margin = 40
Figure 28 - Gain-Phase Plot, 57 VDC, Light Load (100 mA). Vertical Scale: Gain = 10 dB / div, Phase = 30 / div. Crossover Frequency = 0.9 kHz, Phase Margin = 60
The results indicate adequate loop bandwidth and significant gain and phase margin.
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
13 Revision History
Date 25-Feb-04 02-Mar-04 15-Mar-04 19-Jul-05 Author SH PV PV PV Revision 0.1 0.2 1.0 1.1 Description & changes First release Second release after minor edits Final release Fixed schematic and bill of materials (BOM)
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19-Jul-2005 Notes
EP68 3.3 V, 2 A DC-DC Power Supply
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EP68 3.3 V, 2 A DC-DC Power Supply Notes
19-Jul-2005
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19-Jul-2005 Notes
EP68 3.3 V, 2 A DC-DC Power Supply
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EP68 3.3 V, 2 A DC-DC Power Supply
19-Jul-2005
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)Copyright 2005 Power Integrations, Inc.
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